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APT Advanced Processor Technologies Research Group

Behram Khan

Research Associate
Room number: IT-302
Email:
Behram.Khan-2 at postgrad dot manchester dot ac dot uk
khanb at cs dot man dot ac dot uk
Tel: +44 161 275 3531
Other contact details

I am Research Associate within the Advanced Processor Technologies research group at the School of Computer Science, University of Manchester, UK. I work within the JAMAICA project, which is investigating the design of multi-core processors and their accompanying software environments. I have been with the group since January 2006, under the supervision of Prof. Ian Watson.

Biography

Ph.D. Computer Science 2009, The University of Manchester, UK.
MSc. Computer Science 2005, The University of Manchester, UK.
B.Eng. Computer Science 2003, National University of Science and Technology, Pakistan.

Current Research

Currently I am a part of an EU funded project TERAFLUX. Our group is focussing on the development of programming models which are tailored to the TERAFLUX execution model and architecture. My focus is to integrate Transactional Memory (TM) into the overall programming model. I am also involved in the design and development of TM for future large scale systems. I am using HP Labs' COTSon simulator for experimenting with various hardware TM models.

Research Interests

  • Parallel Computer Architecture and Programming Languages (project website) .
  • Software and hardware transactional memory [1]. (project website)

    Publications

    2012
  • Reservation-based Network-on-Chip Timing Models for Large-scale Architectural Simulation
    Javier Navaridas, Behram Khan, Salman Khan, Paolo Faraboschi, Mikel Luján
    In Proceedings of 6th ACM/IEEE International Symposium on Networks-on-Chip (NOCS) May 2012.

    2011
  • MUTS: Native Scala Constructs for Software Transactional Memory.
    Daniel Goodman, Behram Khan, Salman khan, Chris Kirkham, Mikel Lujan and Ian Watson.
    In Proceedings of Scala Days 2011, Stanford CA June 2011.

    2010
  • Scalable Object-Aware Hardware Transactional Memory.
    Behram Khan, Matthew Horsnell, Mikel Lujan and Ian Watson.
    In the 16th International Euro-Par conference on Parallal processing (EuroPar'10), 2010.
  • Clustering JVMs with Software Transactional Memory Support.
    Christos Kotselidis, Mikel Luján, Mohammad Ansari, Konstantinos Malakasis, Behram Khan, Chris Kirkham, and Ian Watson.
    In the 24th International Parallel & Distributed Processing Symposium (IPDPS'10), 2010.
    [PDF] [BibTex]
  • Improving Performance by Reducing Aborts in Hardware Transactional Memory.
    Mohammad Ansari, Behram Khan, Mikel Luján, Christos Kotselidis, Chris Kirkham and Ian Watson.
    In Proceedings of the 5th International Conference on High Performance and Embedded Architectures and Compilers., (HiPEAC'10),
    [Bibtex][PDF]

    2009
  • Exploiting object structure in hardware transactional memory.
    Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn and Ian Watson.
    International Journal of Computer Systems Science & Engineering. Vol. 24. ISSN 0267 6192. September 2009
    [BibTeX][PDF]

    2008
  • An Object-Aware Hardware Transactional Memory System.
    Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn, and Ian Watson.
    In Proceedings of the International Conference on High Performance Computing and Communications (HPCC 2008), pp 93-102.
    [BibTex][IEEE PDF]
  • A First Insight into Object-Aware Hardware Transactional Memory.
    Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn, and Ian Watson.
    In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2008), June 2008.
    [BibTeX][PDF]
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