LARD Introduction

What is LARD?

LARD is a hardware description language developed for describing asynchronous systems - though little is specific to that purpose, so you could use it to descibe synchronous systems if you wanted, or even as a general purpose programming language.

The reason for LARD's development is the AMULET3 microprocessor project. AMULET3 is a fully self-timed implementation of the ARM architecture under development by the AMULET group at the University of Manchester. One of the bottlenecks in the AMULET1 and AMULET2 design processes was the time taken to develop a functional high-level model of the processor for architectural evaluation. An important contribution to overcoming this bottleneck is the adoption of a new more abstract modelling language.

The initial requirements for the language were:

To provide atomic channel communication, as in Tangram and Occam. Removing the need to explicitly model request and acknowledge signals and signalling protocols greatly simplifies the modelling.
To provide high level language programming features such as structured types, scope, etc.
To include a front end with productivity features such as a trace display, source level debugger, visualisation etc.
To be robust enough to cope with the complexity of the AMULET3 processor.
To be flexible enough to allow us to add substantial extra functionality at a later stage when we learn from experience what is needed.
To be simple enough to allow us to get it up and running quickly.

The system that is now in place seems to meet those requirements, and initial results are encouraging. The AMULET3 model is currently able to execute ARM code after an order of magnitude less modelling effort than was required for the previous processors. We are now making LARD available to the wider community in the hope that others will find it useful.

How does LARD differ from VHDL?

VHDL has been used by the group, though not for the AMULET1 and AMULET2 processors. Our main problems with this language are:

VHDL lacks channel communication. As a result it is necessary to explicitly model the request and acknowledge signals used in inter-block communication.
While VHDL allows parallel composition of processes, those processes must be internally sequential. In our designs we often want to have reconverging parallelism at the statement level, and getting the effect of this in VHDL is very awkward.
VHDL is a very complex language, so writing tools that do something useful to it in finite time would be challenging.

How does LARD differ from Tangram?

Tangram solves all of the problems of VHDL described above. Unfortunately it does suffer from some problems of its own:

Tangram lacks some of the high-level programming features that users normally take for granted; in particular it doesn't implement records.
Tangram is proprietry to Philips and we don't have it.

The other problems result from the fact tha Tangram is exclusively a synthesis language:

We might want to model things at a more abstract level than is possible in Tangram. We want to be able to run simulations with very abstract models that are not synthesisable.
On the other hand we might want to model things at a lower level than is possible in Tangram, for example with explicit modelling of signals rather than channels.
Tangram only models time by back-annotating delays from the synthesised model. We want to be able to give explicit timing information in our models so that we can get performance estimates out of abstract high-level models.

Why the silly name?

The answer to that is lost in the mists of time - but I'm pretty sure I thought of it in a pub...

On what basis is it available?

LARD is freely available by ftp to anyone. Of course there is no warranty and no garauntee that any bugs you find will get fixed - though I hope to keep users up to date with new versions if I can.