AMULET1: A Micropipelined ARM
S.B. Furber, P. Day, J.D. Garside, N.C. Paver and J.V. Woods
Abstract
A fully asynchronous implementation of the ARM microprocessor has been
developed in order to investigate the potential of asynchronous logic for
low-power applications. The work demonstrates the feasibility of complex
asynchronous design and shows that the cost and performance characteristics
are similar to clocked designs.
AMULET1 is the first attempt at applying asynchronous techniques to a
design of this complexity and as such there is much room for improvement.
This paper introduces the design approach and organisation of the chip; it
then covers the lessons learned from the first design and points towards
future strategies for its enhancement and the likely benefits which will
accrue from mature asynchronous technology.
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