This is a list of research groups with a major interest in asynchronous logic. This list is not comprehensive; if you are not listed here and would like to be, please mail jgarside@cs.man.ac.uk with your details.
A list of the participants and guests of the ACiD working group is also available.
This list was last updated 5/2/98.
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An fuller index is available.
Acorn Networks, Inc.
University of Adelaide
Department of
Computer Science
Adelaide, Australia
The ECS
project (E&EE)
The University of Aizu
Aizu-Wakamatsu City, Fukushima, Japan
Asynchronous
CAD Group
Universidade de Aveiro
Technische Universitat Berlin
Berlin, Germany
Contact:
Thomas
Schumann
University of British Columbia (UBC)
Vancouver, British Columbia, Canada
University of California,
Berkeley (Berkeley)
Berkeley, California, USA
Asynchronous
Circuit Design and Testing
University of California,
Davis (UC Davis)
Computer Engineering
Research Laboratory
Davis, California, USA
Asynchronous
Systems Research Group
University of California,
San Diego (UCSD)
La Jolla, California, USA
Electronic
Circuits and Systems or
here
Caltech
Pasadena, California, USA
Asynchronous
VLSI group (or
here)
Physics of Computation
University of Cambridge
Cambridge,
UK
Self-timed Circuits
or here
Universidad de Cantabria
Santander, Cantabria,
Spain
Universitat Politecnica
de Catalunya (University of Catalonia)
Barcelona,
Catalonia, Spain
VLSI Group
Chemnitz
University of Technology
Circuit and
System Design (in German)
Chemnitz, Saxony, Germany
Self-timed
Systems
Cogency Technology Inc.
Contact: info@cogency.co.uk
Columbia University
New York, USA
Technical University
of Denmark (DTU)
Computer Systems Section
Lyngby, Denmark
Asynchronous
Design Group
Edinburgh University
Home page for self-timed
FPGAs
Eindhoven University of Technology
Eindhoven, The Netherlands
Parallelism and
Algorithmics Group
Flinders University
Adelaide, Australia
University of Genoa
CAVS
(Computer Architecture and VLSI Systems)
Genoa, Italy
Groningen University
Groningen, The Netherlands
System Design
and VLSI group.
Various publications about
delay-insensitive algebra are available
HaL Computer Systems
University of Hertfordshire
Hertford, UK
Asynchronous
Processor Design
The Chinese University of Hong Kong
Hong Kong
See Johnson Pang's page
HP Labs.
IMEC
Intel Corporation
Kaiserslautern University
AG
Digitaltechnik
Kungl Tekniska Högskolan (KTH)
Electronic System Design Laboratory -
ESDlab
Stockholm, Sweden
University of Kuopio
Kwangju Institute of Science and
Technology (K-JIST)
Kwangju, South Korea
University of Loughborough
Electronic
Systems Design Research Group
Loughborough, UK
LSI Logic Inc.
Contact person:
Yaron Kretchmer
University of Manchester
Manchester, UK
The AMULET group
Rainbow Project
University of Manitoba
Winnipeg, Manitoba, Canada
Contact person:
rahard@ee.umanitoba.ca
Report
on Xilinx Asynchronous Multiplier available
Monash University
Clayton, Victoria, Australia
Some publications
are available
University of Newcastle upon Tyne
Newcastle upon Tyne, UK
VLSI Design
group (CS).
Microelectronic
Systems Design Research (E&EE)
Oregon State University
Corvallis, Oregon, USA
Research on
Micropipelines Designs
Osaka University
Terada Laboratory
Osaka, Japan
Datadriven
Parallel Processing (Japanese only)
(see also Sharp Electronics)
Oxford University
Oxford, UK
Course
on Asynchronous Systems and Circuits
Philips Research Laboratories
Eindhoven, The Netherlands
University of Pisa
Pisa, Italy
Queensland University of Technology
Saitama
University
Ito laboratory
Urawa City, Japan
Sharp Electronics
Reference to
Data Driven
Architecture
(see also Osaka University)
University of South Australia
Adelaide, Australia
South Bank University
London, UK
Centre for
Concurrent Systems and VLSI
University of Southern California (USC)
Computer
Engineering Division
Los Angeles, California, USA
Asynchronous CAD group
Stanford University
Stanford, California, USA
Digital
Systems CAD Group/Asynchronous Group
with papers available
by ftp (an
index is provided
here).
Sun Microsystems Laboratories, Inc.
Technical
Report on counterflow pipeline architecture available.
University of Surrey
Guildford, UK
Computer
Systems Research Group (CSRG)
Asynchronous
System and Circuit Design
The University of Sydney
Sydney, Australia
Contact: Associate
Professor R.F.C. (Bob) Walters
Tampere University of Technology
Tampere, Finland
Signal Processing Laboratory
University of Tasmania
Tasmania, Australia
Computer
Design Group
Technion
Haifa, Israel
Asynchronous
Logic Research
Theseus Logic, Inc.
Null Convention Logic
Tokyo Institute of Technology
Tokyo, Japan
Nanya Laboratory
University of Tokyo
Tokyo, Japan
Dependable
and High-performance Computing
Politecnico di Torino
Asynchronous Circuit
design and testing
Toshiba
Universitat Ulm
Ulm, Germany
University of Utah,
Salt Lake City, Utah, USA
Asynchronous
Circuits and Systems (CS)
Contact: Chris Myers (EE)
University of Washington
Seattle,
Washington, USA
Design
and Analysis of Asynchronous Circuits.
University of Waterloo
Waterloo, Ontario, Canada
The MAVERIC Research Group
University of Westminster
London, U.K.
Asynchronous
Circuit Design