Verification of Speed-Independent Circuits
Contributor: Oriol Roig

versify is a CAD tool for the verification of speed-independent circuits against a Signal Transition Graph (STG) specification. The STG describes both the behavior of the environment and the expected behavior of the circuit. Circuit and environment are composed forming a closed system, and the reachability analysis of such a system is performed. A circuit will be correct if it does not generate any unexpected behavior as a reaction to the changes dictated by the environment.

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