Although the technology for optical systems tends to vary, the architectures emerging tend to be based on parallel pipelined arrays. The arrays are envisaged as being regular two-dimensional planes of identical elements (although the function may vary from array to array). These communicate in a regular manner with elements on the next plane. Such structures are ideally suited to Single Instruction Multiple Data computing.
A high level simulator where the element functionality and interconnection strategy over a number of stages can be specified is in the course of construction. This project will use the simulator to enable the suitability of different logical and interconnection arrangements in providing functions ranging from bit imaging operations to conventional logic functions to be assessed. It is also expected that limitations arising from the regularity of the logic and interconnections will be identified.
Reference: A. Warden, M.Sc. Thesis, University of Manchester, 1993