AMULET group: postgraduate opportunities

The AMULET group has established a position as one of the world's leading centres for research into asynchronous (self-timed) design. The group's approach is based upon tackling major design challenges, working in collaboration with other companies and universities with common interests.

AMULET1 was the world's first asynchronous implementation of a commercial microprocessor architecture. It executes standard ARM code, and proved that complex asynchronous design is feasible. AMULET1 was recognised with one of three 1995 British Computer Society Awards

Advanced RISC Machines Limited, the owners of the ARM architecture, have an agreement with the University which gives them rights the the AMULET processor technology and allows us to offer the 'ARM Research Studentship' to a worthy candidate.

The AMULET2e microprocessor, a chip with an enhanced AMULET processor core and an on-chip cache memory, has been fabricated and demonstrated. It shows significant power saving opportunities and much lower electromagnetic emission than a comparable synchronous chip. It has a simple external interface and is a flexible embedded processing unit.

Construction a radically redesigned AMULET3 processor has already started. This will offer much more processing power without compromising energy efficiency or EMC. The chip incorporates a number of new design features, and problems such as asynchronous on-chip buses and internal DMA are being addressed.

We are getting increasingly close to commercial viability, and future research plans revolve around making the technology more attractive to our industrial collaborators. Students are welcome to join the group to work in any relevant areas. Suggested topics are:

Design tools for high-speed asynchronous circuits. We need to reduce the development costs of asynchronous designs, which so far have mainly been designed by hand.
Low-power circuit design. Asynchronous design is potentially low power, but we need to make the most of this advantage by improving the power-efficiency of our circuits.
Design for testability of asynchronous circuits. As asynchronous circuits approach commercial exploitation, it is essential that reliable and economic testability strategies are developed.
High-speed asynchronous circuits. How do we minimise the performance overhead of asynchronous control circuits? What architectures are enabled by the asynchronous framework?
Other asynchronous on-chip units: coprocessors, write buffers, improved cache designs ...
Minimising electromagnetic interference. Asynchronous circuits distribute their power consumption across time and frequency. To what extent does this affect their electromagentic emissions? How should circuits be designed to minimise electromagnetic interference?

If you are interested in any of these areas, or wish to do research on a related topic, contact us.

The Department of Computer Science at the University of Manchester has many other research activities and opportunities.