Analyzing the Timing Error in Distributed Simulations of Asynchronous Computer Architectures


G. Theodoropoulos, J.V. Woods

Abstract

This paper discusses the time modelling problem in Register Transfer Level distributed simulation models of asynchronous architectures written in occam. The results presented in the paper confirm that even if preemptions are allowed to occur, the timing error is not significant and it is acceptable at this level of simulation.


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