The groups' interests are in asynchronous logic and low-power electronics. In particular we have built two asynchronous implementations of the ARM microprocessor, and are working on a third.
At present I am employed on a three year contract to develop tools for asynchronous circuit design, funded by an EPSRC ROPA award. I have developed a hardware description language called LARD which is being used for the AMULET3 processor design.
The LARD work is entirely software engineering, which is a change of direction from my previous work. My Ph.D. work developed a superscalar asynchronous processor called SCALP. SCALP proved an interesting exercise in asynchronous logic design but was let down somewhat by some aspects of its architecture. The work also taught me a lot about how not to model asynchronous systems in VHDL which has helped with LARD.