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APT Advanced Processor Technologies Research Group

TERAFLUX

Future Teradevice systems will expose a large amount of parallelism (1000+ cores) that cannot be exploited efficiently by current applications and programming models. The aim of the TERAFLUX project is to propose a complete solution that is able to harness the large-scale parallelism in an efficient way. This project is a Future Emerging Technologies (FET) INTEGRATED PROJECT (IP) granted by the European Commission's FP7 IST programme's FET Proactive initiative. More details of the project as a whole can be found on the project webside, TERAFLUX.

As a partener in this project Manchester University is developing a hardware to support Transactional Memory and a high productivity language based on Scala. As part of this work we have developed Manchester University Transactions for Scala (MUTS) and Dataflow Scala (DFScala). MUTS is a software transactional memory for Scala and Java that supports a range of different styles of transaction, while DFScala is a library that allows the type safe construction of complex dataflow graphs in Scala.