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16th UK Asynchronous Forum Programme
Day 1 Monday, 6th September 2004
13:00 Registration
14:00 Design and Evaluation of a Network-based Asynchronous
Architecture
L. Dilparic and D.K. Arvind, University of Edinburgh
14:30 Using Early Data Validity for Synthesis of Asynchronous
Circuits
N. Gupta and D.A. Edwards, University of Manchester
15:00 Electromagnetic Analysis of Synchronous and Asynchronous
Circuits using Hard Disc Heads
A.T. Markettos and S.Moore
University of Cambridge
15:30 Coffee
16:00 A Simulation Methodology for Electromagnetic Analysis and
Testing on Synchronous and Asynchronous Processors
H. Li, S. Moore and A.T.Markettos
University of Cambridge
16:30 Protecting Cryptographic Devices from Differential Power Analysis
J.P. Murphy, D. Sokolov, A. Bystrov and A. Yakovlev,
University of Newcastle
17:00 Security Investigations on an Asynchronous PLA Configuration
P. Oikonomakos and S. Moore,
University of Cambridge
17:30 Presentations by attendees
18:00 Business meeting
19:30 Forum Dinner
Day 2 Tuesday, 7th September 2004
09:15 Delivering Asynchronous Design Advantages to Mainstream Designers:
FTL Systems' Merlin(tm) Tool Suite,
J. Willis, D. Soderberg, R. Betcher, S. Suribhotla, FTL Systems (USA and UK)
R. Jorgenson, Theseus Logic (USA)
09:45 Concurrency in Synchronous Systems
D. Potop-Butucaru, B. Caillaud and A. Benveniste,
IRISA, Rennes, France
10:15 Wrappers That Weaken DI Processes
H.K. Kapoor and M.B. Josephs, London South Bank University
10:45 Coffee
11:15 Investigation on Asynchronous Petri Nets Design and Implementation
Using Verilog HDL
H.S. Low and P.D.Minns, University of Northumbria
11:45 Design of an Asynchronous Sequence Generator with Dynamically
Loadable Count Ratio
Y. Zhou and A. Yakovlev, University of Newcastle
12:15 Modelling Level-Crossing Sampling Asynchronous AD Converter
J. Zhu and E.G. Chester, University of Newcastle
12:45 Close
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