APT research areas
Challenging the processing demand for the provisioning of QoS
and security for next generation networks
Dr Sakir Sezer, Dr Maire McLoone, Professor John McCanny,
The Institute of Electronics, Communications and Information Technology Queen’s University Belfast, Northern Ireland Science Park, Queen's Island, Belfast, Northern Ireland, UK
INTRODUCTION
The rapid developments in communication systems and integrated services in recent years have resulted in the need for scalable and configurable networks and the need to perform reliable data security in real-time. Emerging broadband Internet services and applications such as Internet TV/Radio, gaming, Video on Demand (VoD) and other types of Internet entertainment as well as Internet banking/shopping/auction and e-businesses are increasingly demanding a higher degree of transmission bandwidth, complex security, lower end-to-end propagation delays and the support of application specific Quality of Service (QoS). For example, bandwidth intensive real-time and interactive services such as multiple High definition TV channels, video-conferencing, VoD, WEB casting and other streamed video services will require terabits of information being delivered to the “end of the street”.
Coherently services including Internet banking/-shopping/-auction and e-businesses are increasingly demanding not only a higher degree of transmission bandwidth but also more complex security and data protection systems that can operate at wire speed. The secure provisioning of these services has significant commercial and economic impact for an increasing number of businesses and the gross national product. Nowadays, an Internet virus attack can be the cause of shutting down key commercial servers of multibillion corporate organisations and the cause of financial losses of several billion dollars.
According to MX Labs, more than fifty percent of Internet email is spam, viruses and other unwanted content. Ferris Research estimated that in 2003 unsolicited email would cost U.S. companies $10 to $13 billion. Spam results in lost productivity, communication bandwidth consumption, increased storage costs, IT resource drain and increased corporate liability.
Interoperability of legacy and emerging communication systems, migration of technology, standards and services drives the need for more sophisticated network processing solutions that are optimised to the needs of network nodes in terms of programmability, processing throughput, power consumption and cost.
Internet traffic is continuously doubling every 12 months despite the downturn of the telecommunications market in 2000. This is a much greater rate of increase than Moore’s law. Subsequently, the exponential increase of Internet traffic in conjunction with the increase of data processing complexity due to sophisticated QoS and security demands of services accelerates the demands for network processing at core and access networks. These demands cannot be sufficiently satisfied with traditional network processing techniques that follow Moore’s law. Data processing requirements at network nodes have surpassed the processing limits of off-the-shelf data products including many standard network processors that have been recently introduced to the market.
In order to sustain such progression whilst being able to offer state-of-the-art security and QoS for future networks, new silicon technology, complex SoC design methodologies and novel network processing architectures must be investigated.
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VISION STATEMENT
The proposed grand challenge on network processing shall address a number of key research topics within microelectronics and SoC technology that will help bridge the widening technology gap between the demands on network processing at network nodes and access equipment, and the traditional micro- and network processor based technologies. The research shall target short-to-medium-term and long-term research objectives in order to ensure a sustainable model for the provisioning of key microelectronics and SoC technology for next generation of broadband networks.
SHORT-TO-MEDIUM TERM TARGETS
Short-to-medium term targets shall address architectural limitation and scalability issues of current data processing architectures and memory technologies for network processing. The research topics may include:
- Novel heterogeneous packet/frame processing architectures that can be scaled to support throughput rates beyond 100 Gbps.
- Highly scalable packet processing architectures for the provisioning of Internet QoS at link throughput rates beyond terabits.
- Optimised network security processing architectures and security platforms that will allow off-load software based security application on PCs, workstations and services
- (e.g. Norton) onto more powerful sophisticated SoC network-security platforms that can be embedded within PCs, workstations or servers or deployed as security nodes guarding access to networks.
- Research into architectural tradeoffs of network processors and the in-depth study of processing engines for scalable parallel processing of network functions (look-up, packet scheduling, encryption, packet content filter etc). Tradeoffs of architectures based on multiple RISC type and multiple micro-engine type processing elements versus configurable domain-specific data-path architectures.
- Memory size and memory access are key limiting factors of current network processing circuits and network processors. The research may target the development of novel on-and off-chip memory access technologies, packet cashing and embedded distributed memory architectures.
LONG-TERM TARGETS:
The long-term research targets shall address technology, design methodology and programmability of complex high-performance SoCs for networks. The research topics may include:
- Optical network processing (network processing functions at layers 2, 3 and 4).
- Research into novel embedded memory technologies for SoC network processing. The research may target the development of new microelectronics memory technologies and heterogeneous on-chip memory architectures, optimised for extreme on-chip performance (availability, accessibility and bandwidth).
- Research into the design of adaptive communication and information System-on-a-Chip. Integration of various network access standards/protocols and application platforms onto a chip that can dynamically adapt themselves to the needs of users in terms of applications and services based on the available communication environments and infrastructure.
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