This program processes the output of the bundle checker and presents the results in a more concise and readable form. Despite condensing the data, no information is lost: all the errors encountered in the trace file are reported. The output is sorted according to the type of error (and within an error type according to time). Where the same type of error occurs at the same moment for several signals in a bus, the separate errors are consolidated into one message. There is a further filter called supersumb which compresses the output even further.
The headers indicating the context of the error processing and the activity time statistics produced by the bundle checker are also included in the output of this program.
summarisebundles [infile]
Summary (v1.10) of Bundle analysis (v1.34)
Reading signal definitions from testtmp.out (11:06 18/10/95) schematic format
Default set up time = 1.000 ns
Default hold time = 0.500 ns
Reading bundle definitions from testtmp.check (16:40 20/10/95)
Prefix:
Default set up time = 1.000 ns
Default hold time = 0.000 ns
4 bundles in total
Performing bundle checks on file test.out.
There were no bad req signals
There were no bad ack signals
There were no bad data signals.
________________________________________________________________________________
CONSTRAINT VIOLATIONS
xmy.xheir.data3[0] changed at 45.000 ns
between req: xmy.req3 at 40.000 ns
and ack xmy.ack3 at 50.000 ns
data1 changed at 180.000 ns
between req: xmy.xheir.req1 at 170.000 ns
and ack: ack1 at 180.000 ns
data1 changed at 216.000 ns
between req: xmy.xheir.req1 at 215.000 ns
and ack: ack1 at 220.000 ns
data2[3:2] changed at 236.000 ns
between req: req2 at 235.000 ns
and ack: ack2 at 237.000 ns
data2[5:4] changed at 236.500 ns
between req: req2 at 235.000 ns
and ack: ack2 at 237.000 ns
data2[6] changed at 237.000 ns
between req: req2 at 235.000 ns
and ack: ack2 at 237.000 ns
data2[1:0] changed at 242.000 ns
between req: req2 at 241.000 ns
and ack: ack2 at 244.000 ns
data2[3] changed at 243.000 ns
between req: req2 at 241.000 ns
and ack: ack2 at 244.000 ns
data2[2] changed at 244.000 ns
between req: req2 at 241.000 ns
and ack: ack2 at 244.000 ns
Errors on 2 buses/signals
________________________________________________________________________________
SET UP TIME VIOLATIONS
data2[5,3:0] changed at 235.000 ns
actual sut : 0.000 ns (< 2.000) before req: req2
data2[1] changed at 241.000 ns
actual sut : 0.000 ns (< 2.000) before req: req2
Errors on 1 bus/signal
________________________________________________________________________________
HOLD TIME VIOLATIONS
data2[2:1] changed at 102.900 ns
actual ht : 2.900 ns (< 3.000) after ack: ack2
All errors on 1 bus/signal
________________________________________________________________________________
Violations: constraint 13 set up 6 hold 2 total 21
Bad signals: req 0 ack 0 data 0 total 0
________________________________________________________________________________
Simulation terminates at 250.000 ns
Times from req to ack:
req/ack calls avg (ns) max (ns) max at (ns) min (ns)
xmy.req3(f)/xmy.ack3(f) 3 8.167 10.000 50.000 5.000
req4(r)/ack4(r) 2 7.250 9.500 75.000 5.000
xmy.xheir.req1(r)/ack1(f) 6 7.233 19.900 150.000 1.000
req2(f)/ack2(r) 5 3.100 5.000 20.000 0.500
Note how multiple errors for signals in the same bus have been
consolidated into a single message. A set of errors on all the bus
signals between index m and index n is denoted as busname[n:m]. Where
the set of indices is non-contiguous, the indices are separated by
commas. For example, in the report above, the set up error for
data2[5,3:0] indicates that were were set up errors at the same
instant for bus lines 5, 3, 2, 1 and 0.
This software was developed as part of the OMI HORN
project at the University
of Manchester Department of Computer Science, funded as part of
the European Union ESPRIT initiative (project number 7249).