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APT research areas

APT Group Papers

2003

L. Janin, A. Bardsley and D. A. Edwards
Simulation and Analysis of Synthesised Asynchronous Circuits
International Journal of Simulation Systems, Science & Technology, Vol. 4, No. 3-4, pp. 31-43
ISSN 14738031
Abstract PDF (234K).
T. Felicijan, S.B. Furber
An Asynchronous Ternary Logic Signalling System
IEEE Transactions on VLSI Systems, Vol. 11, no. 6, Dec. 2003, pp 1114 - 1119
ISSN 1063-8210
Abstract PDF (365K). IEEE Copyright
T. Felicijan, W.J. Bainbridge, S.B. Furber,
An asynchronous low latency arbiter for Quality of Service (QoS) applications.
15th IEEE International Conference on Microelectronics (ICM'03), pp 123-126,
Cairo, Egypt, Dec 2003
ISBN: 977-05-2010-1
Abstract PDF (74K). IEEE Copyright
S. Mohammadi, S.B. Furber and J.D. Garside
Designing Robust Asynchronous Circuits
IEE Proceedings - Circuits, Devices and Systems, vol. 150 no. 3, June 2003, pp. 161-166.
ISSN 1350-2409.
Abstract PDF (445K).
T.Felicijan, S.B.Furber
Quality of Service (QoS) for Asynchronous On-Chip Networks
Formal Methods for Globally Asynchronous Locally Synchronous Architecture (FMGALS 2003)
Pisa, Italy, Sept. 2003
Abstract PDF (74K).
D.Hormdee, J.D.Garside, S.B.Furber
An asynchronous copy-back cache architecture
Microprocessors and Microsystems Vol.27 Iss.10 pp 485-500 Nov 2003
ISSN 0141-9331
Abstract Microprocessors and Microsystems Vol:27, Iss.10 © 2005 Elsevier B.V.
D. R. Lester and P.Gowland
Using PVS to validate the Algorithms of an Exact Arithmetic
Theoretical Computer Science, Volume 291; pp203-218, Jan 2003.
Abstract Theoretical Computer Science Vol:291, Iss.2 © 2005 Elsevier B.V.
X. Ni, W. Suntiamorntut, B.M.G. Cheetham, L.E.M. Brackenbury and D.J. Tait
Design of asynchronous function unit & software development tools for a low-power DSP
IEE Colloquium on DSP_enabled Radio, pp 1-10; Scotland; Sept 2003
C.F. Brej and J.D. Garside
Early Output Logic using Anti-Tokens
Proceedings International Workshop on Logic Synthesis
IEEE/ACM Publications, May 2003; pp. 302-309
Abstract PDF(123K) Presentation slides (209K PowerPoint) IEEE Copyright
W. Suntiamorntut, L. Brackenbury
Functional Unit for Low-Power DSP Architecture
Proceedings IEE Postgraduate Seminar on SoC Design, Test and Technology
IEE Publications, September 2003
ISSN 0963-3308
L. Ren, P. Marshall, S.B. Furber
Prototyping a Digital Neural Network System-on-Chip using an Altera Excalibur Device
Proceedings IEE Postgraduate Seminar on SoC Design, Test and Technology
IEE Publications, September 2003
ISSN 0963-3308
Abstract PDF (138K). © IEE Publications.
Y. Liu, S.B. Furber
A Low-Power Asynchronous Multiplier
Proceedings IEE Postgraduate Seminar on SoC Design, Test and Technology
IEE Publications, September 2003
ISSN 0963-3308
L.A. Plana, P.A. Riocreux, W.J. Bainbridge, A. Bardsley, S. Temple, J.D. Garside, Z.C. Yu,
SPA - A Secure Amulet Core for Smartcard Applications
Microprocessors and Microsystems Vol. 27, Issue 9; pp. 431-446
October 2003
ISSN 0141-9331
Abstract Microprocessors and Microsystems Vol:27, Iss.9 © 2005 Elsevier B.V.
Z.C. Yu, S.B. Furber, L.A. Plana
An Investigation into the Security of Self-timed Circuits
Proceedings of the 9th IEEE Intl Symp. on Asynchronous Circuits and Systems (ASYNC'03),
pp 206-215, Vancouver, May 2003
ISBN 0-7695-1898-2, ISSN 1522-8681
Abstract PDF (660K). IEEE Copyright
A. Efthymiou, J.D. Garside
Adaptive Pipeline Structures for Speculation Control
Proceedings of the 9th IEEE Intl Symp. on Asynchronous Circuits and Systems (ASYNC'03),
pp. 46-55, Vancouver, May 2003
ISBN 0-7695-1898-2 ISSN 1522-8681
Abstract PDF (344K). IEEE Copyright
W.J. Bainbridge, W.B. Toms, D.A. Edwards, S.B. Furber,
Delay-Insensitive, Point-to-Point Interconnect using m-of-n codes
Proceedings of the 9th IEEE Intl Symp. on Asynchronous Circuits and Systems (ASYNC'03),
pp. 132-140, Vancouver, May 2003
ISBN 0-7695-1898-2 ISSN 1522-8681
Abstract PDF (297K). IEEE Copyright