A Power-Efficient Duplex Communications Controller

S. B. Furber, A. Efthymiou and Montek Singh

Abstract

A delay-insensitive inter-chip communication system is proposed that optimises pin- and power-efficiency. When data is being transmitted bidirectionally, a data symbol passed in one direction is acknowledged by a data symbol passing in the other direction. When communication is unidirectional, a simple acknowledge protocol is used. If no data communication is taking place the system is quiescent. Either end may initiate communication, and the situation where both ends attempt to initiate communication at the same time is addressed and resolved in a way that is insensitive to the inter-chip delays.

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