The design of the control circuit for an asynchronous instruction prefetch unit using signal transition graphs

S.-H.Chung and S.B.Furber

Abstract

AMULET3 is the third fully asynchronous implementation of the ARM architecture designed at the University of Manchester. It implements the most recent version of the ARM architecture (v4T), including the Thumb instruction set. Significant architectural changes from its predecessors help achieve higher performance without sacrificing the advantages of asynchronous design. One of th ese changes is to incorporate a highly parallel instruction prefetch unit. This paper introduces the instruction prefetch unit in AMULET3, highlighting where speed-independent control circuits are implement ed using signal transition graphs (STGs). In order to show how control circuits are implemented in the instruction prefetch unit of AMULET3, we presents several examples with relevant STGs and the synthesized circuit results.

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