Simulation and Analysis of Synthesised Asynchronous Circuits

L. Janin, A. Bardsley and D. A. Edwards

Abstract

Recent advances in automated synthesis tools for asynchronous circuits have made possible the design of large self-timed circuits. However, these new tools are still weak in their simulation and debugging capabilities because asynchronous circuits pose different challenges and opportunities in these areas from conventional clocked circuits. Balsa is such a tool intended for the synthesis of large asynchronous circuits. Two major additions to the Balsa asynchronous circuit synthesis system are presented in this paper: a simulation system and a visualisation system specifically addressing asynchronous circuit simulation. Both operate at the Handshake Component level extending Balsa with new debugging, profiling and validation capabilities whilst at the same time improving simulation speed by over four orders of magnitude compared with the previously used asynchronous modelling system. The new framework is evaluated on a Balsa-synthesised ARM-compatible asynchronous processor.

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