Go to main content

School of Computer Science Intranet

APT research areas

Discover our main research areas

Reconfigurable Latch Controllers for Low Power Asynchronous Circuits

M. Lewis, J.D. Garside, L.E.M. Brackenbury


A method for reducing the power consumption in asynchronous micropipeline-based circuits is presented. The method is based around a new design for latch controllers in which the operating mode of the pipeline latches (normally open/transparent or normally closed/opaque) can be selected according to the dynamic processing demand on the circuit. Operating in normally-closed mode prevents spurious transitions from propagating along a static pipeline, at the expense of reduced throughput. Tests of the new latch controller circuits on a pipelined multiplier datapath show that reductions in energy per operation of up to 32% can be obtained by changing to the normally-closed operating mode. Estimates suggest that in a typical application which exhibits a variable processing demand, a power reduction of between 16- 24% is possible, with little or no impact on maximum throughput.

PDF (172k). IEEE Copyright