School of Computer Science Intranet
P.B. Endecott, S.B. Furber.
Conventional hardware description languages do not provide all the facilities required for efficient behavioural modelling of asynchronous systems. This paper presents a new HDL incorporating CSP-like channel communication and other features making it more suitable for this task. A model of a simple microprocessor is used to illustrate how the language and tools can be applied to real design problems. We use the tool to investigate the complex relationships that can exist between the speed of individual blocks and the system's overall performance, and look at power modelling based on channel activity.