A CMOS VLSI Implementation of an Asynchronous ALU

J. D. Garside

Abstract

A CMOS self-timed ALU has been developed as part of an asynchronous implementation of the ARM microprocessor. This unit exploits the data dependency inherent in many arithmetic operations to enable a small, simple ALU to deliver a mean performance comparable with that of a more sophisticated synchronous one with consequent reductions in both silicon area and electrical power consumption. The self-timed nature of the unit means that the majority of operations complete quickly whilst allowing rare `worst-case' operations to take longer, maintaining a high average throughput.

This paper presents instruction usage statistics to justify the claimed performance and SPICE simulation results of measurements taken from the layout.

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