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Energy Efficient Functional Unit for a Parallel Asynchronous DSP

Wannarat, Suntiamorntut


In the last few years, the mobile market has grown extensively. The next generation of these 3G or 4G devices require much higher performance to operate the more complex algorithms required from increased functionality such as multimedia, voice recognition and internet access. As a consequence, the number of transistors required increases dramatically. Meanwhile, the energy density of existing battery technologies is not increasing at the same rate. Thus in order to have a longer battery operating time, energy efficient computing in a DSP assumes greater emphasis. CADRE was designed and expected to be a minimum power consumption asynchronous DSP whilst meeting the performance requirements of next generation cellular phones. In the original CADRE, most of the research was focused on the algorithmic and architectural level design and resulted in a good energy economical design at these levels. However, the power dissipation of the original CADRE showed that approximately 50% of the overall power consumption was found to be dissipated in the functional units (FUs). Thus, reducing the power consumption of the FU was the primary motivation for the work described in this thesis. The FU has been re-designed focusing on improving the energy efficiency at the logic, circuit and layout levels. Coherent design techniques have been applied. These include the use of pass gate logic, the sharing of the adder between the multiplier and adder, a combined logic block for performing the Hamming distance and normalization function and a new timing mechanism for better tuning the asynchronous control to the datapath. These functions reduce the amount of logic and possible failure of the system. CADRE-s has been implemented as a full custom design and simulations are presented to successfully demonstrate the energy-efficiency of the FU. The results show that the FU designed can achieve an energy improvement by a factor of 5 in the multiply accumulator units and a factor of nearly 2 for the overall system compared with the original CADRE system. This demonstrates the importance that energy efficient logic, circuit and layout techniques contribute to a design.

The thesis is available as PDF (2.8MB).