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Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits

A. Efthymiou, C. Sotiriou, D.A. Edwards


This paper presents 3phiLSSD, a novel, easily-automatable approach for scan inserti on and ATPG of asynchronous circuits. 3phiLSSD inserts scan latches only into global circuit feedback paths, leaving the local feedback paths of asynchronous state-storing gates intact. By employing a three-phase LSSD clocking scheme and complemented by a novel ATPG metho d, our approach achieves industrial quality testability with significantly less area ove rhead testing the same number of faults compared to full-scan LSSD. The effectiveness of our approach is demonstrated on an asynchronous SOC interconnecti on fabric, where our 3phiLSSD ATPG tool achieved over 99% test coverage.

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