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APT research areas

Discover our main research areas

APT Postgraduate Opportunities

Group Interests Board on Test

The Advanced Processor Technologies (APT) group has interests in many aspects of advanced and novel approaches to processing and computation. Current and recent projects have focussed on asynchronous technology and tools, novel on-chip multiprocessor architectures exploiting lightweight thread mechanisms, and hardware support for large-scale neural systems.

APT People and Ambience

The group currently includes 8 academic, 12 research and 2 technical support staff and 10 research students. Organisation is informal and interaction between workers in different areas of interest is encouraged. A meeting of the whole group is held most weeks where researchers (including, of course, Ph.D. students) have the opportunity to present their current work and ideas in the informal atmosphere of the group and gain from constructive critiscism and helpful suggestions.

Postgraduate students - especially at PhD level - are encouraged to develop and publish their research. This enhances the value of a thesis, provides the opportunity to present work to the professional world at conferences, sometimes in exotic places, and raises the profile of the individual and the group in the research community.

Out of work hours group members "organise" various activities varying from theatre trips to badminton. Naturally a number of these (especially birthdays) involve beer.


The APT Project _ S p e c t r u m :

The Amulet Asynchronous Processors Amulet-3

The group has a well established international reputation for work on asynchronous processor designs which have targeted both low power and low emission applications. Amulet1 was the first asynchronous implementation of a commercial 32-bit processor architecture and earned the group a BCS award in 1995. Amulet2e (1996) and Amulet3 (2000) advanced the technology and culminated in the integration of Amulet3 into the illustrated DRACO chip, a commercial telecommunications controller.

The latest asynchronous design, SPA , is a synthesised processor designed for low electromagnetic leakage and power supply variation for use in high security applications such as smartcards.

If you are interested in opportunities for postgraduate research in this area,
please contact:

Dr Jim Garside email: jdg@cs.man.ac.uk


On-Chip Multiprocessing - The JAMAICA Project Multi-Processor Chip graphic

The challenge facing the processor designer is to exploit the very large number of transistors becoming available on a chip while controlling design costs. One approach is to integrate large numbers of relatively simple processors on a single chip.

The JAMAICA project is investigating the hardware and software technologies needed to exploit the performance potential of future VLSI. It starts with the assumption that future exploitation of Instruction Level Parallelism will be limited by complexity and that the future lies with collections of CPUs exploiting parallelism at the level of lightweight threads comprising hundreds or thousands of machine instructions.

If you are interested in opportunities for postgraduate research in this area,
please contact:

Prof. Ian Watson email: iwatson@cs.man.ac.uk


Tools for Asynchronous Design

Commercial acceptance of Asynchronous design will happen only if a robust suite of design tools is available for its support. The group is working in the areas of High-Level Asynchronous Circuit Synthesis (Balsa), Simulation (Lard) and Layout-Sensitive production Test.

If you are interested in opportunities for postgraduate research in this area,
please contact:

Dr Doug Edwards email: doug@cs.man.ac.uk


Hardware Support for Large Scale Neural Networks Neuron Graphic

The "SpiNNaker" project has begun the development of a hardware system capable of simulating up to a billion neurons in real time. The focus of this work is "Neural Systems Engineering" - understanding how robust high-performance computing systems can be built from unreliable component neurons

If you are interested in opportunities for postgraduate research in this area,
please contact:

Prof. Steve Furber email: sfurber@cs.man.ac.uk


Asynchronous DSP

The CADRE digital signal processor targets low power applications using innovative architectural features.

If you are interested in opportunities for postgraduate research in this area,
please contact:

Dr Linda Brackenbury email: lemb@cs.man.ac.uk


Networks-on-Chip and GALS On-Chip Interconnect

The integration of complete computer systems on single chips requires on-chip interconnect. Within the group the initial MARBLE asynchronous bus was superseded by the more sophisticated "CHAIN" system. Current work is concentrated on a GALS (Globally Asynchronous Locally Synchronous) approach which facilitates the exploitation of the best of each technology.

If you are interested in opportunities for postgraduate research in this area,
please contact:

Prof. Steve Furber email: sfurber@cs.man.ac.uk


Advanced Computer Arithmetic Exact Arithmetic

The floating point operations commonly used in science and engineering applications are approximations dictated by the accuracy inherent in the computer hardware. The errors introduced by approximations can accumulate and give grossly erroneous results which may be undetectable. Exact arithmetic techniques avoid the fixing of the precision of intermediate values and guarantees that such errors do not occur.

If you are interested in opportunities for postgraduate research in this area,
please contact:

Dr David Lester email: drl@cs.man.ac.uk


The Future

If you are interested in any of these areas, or wish to do research on a related topic, contact us. However if you wish to apply you must fill in a University application form.