The Advanced Processor Technologies Research Group
Ian Watson: publications
- TERAFLUX: Harnessing dataflow in next generation teradevices
- Software transactional memories for Scala
- Architectural Support for Exploiting Fine Grain Parallelism
- A case for Exiting a Transaction in the Context of Hardware Transactional Memory
- SnCTM: Reducing False Transaction Aborts by Adaptively Changing the Source of Conflict Detection
- Scalable Object-Aware Hardware Transactional Memory
- Clustering JVMs with Software Transactional Memory Support
- Improving Performance by Reducing Aborts in Hardware Transactional Memory
- On the Performance of Contention Managers for Complex Transactional Memory Benchmarks
- Profiling Transactional Memory Applications
- Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
- An Object-Aware Hardware Transactional Memory System
- Constraint Based Optimization of Stationary Fields
- Adaptive Loop Tiling for a Multi-cluster CMP
- Intelligent selection of application-specific garbage collectors
- A Study of a Transactional Parallel Routing Algorithm
- Towards Intelligent Analysis Techniques for Object Pretenuring
- Optimizing Chip Multiprocessor Work Distribution using Dynamic Compilation
- Branch Prediction with Bayesian Networks
- Supporting Higher Order Virtualization
- Loop Parallelisation for the Jikes RVM
- An Automatic Runtime DOALL Loop Parallelisation Optimization for Java
- A RISC Hardware Platform for Low Power Java.
- Exploiting Implicit Parallelism in Functional Programs with SLAM.
- A two dimensional vector architecture for multimedia.
- Dynamic Java threads on the Jamaica single-chip multiprocessor.
- VLSI architecture using lightweight threads (VAULT) - choosing the instruction set architecture.
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