| Skip to main content | Skip to navigation | Skip to Search |
Advanced Processor Technologies Home
APT Advanced Processor Technologies Research Group

The Advanced Processor Technologies Research Group


SpiNNaker Overview

APT Group Papers

2010

  1. Cámara, J.M. and Moretó, M. and Vallejo, E. and Beivide, R. and Miguel-Alonso, J. and Martinez, C. and Navaridas, J.
    Twisted Torus Topologies for Enhanced Interconnection Networks
    Parallel and Distributed Systems, IEEE Transactions on, Vol.21, No.12, pp.1765-1778, 2010.
    ISSN1045-9219
    DOI-Link Abstract IEEE Copyright
  2. Javier Navaridas and Jose Miguel-Alonso and Francisco Javier Ridruejo and Wolfgang Denzel
    Reducing complexity in tree-like computer interconnection networks
    Parallel Computing, Vol: 36, No. 2-3, pp. 71-85, 2010
    ISSN 0167-8191
    DOI-Link Abstract
  3. Shao, W.; Brackenbury, L.;
    Early stopping turbo decoders: a high-throughput, low-energy bit-level approach and implementation
    Communications, IET, Vol. 4, Iss.17, pp 2115 - 2124, November 26, 2010.
    ISSN 1751-8628
    DOI-Link Abstract
  4. Francesco Galluppi, Alexander Rast, Sergio Davies and Steve Furber
    A General-Purpose Model Translation System for a Universal Neural Chip
    17th International Conference, ICONIP 2010, Sydney, Australia, November 22-25, 2010, Proceedings, Part I
    LNCS, Volume 1 / 1973 - Volume 6443/2010, pp. 58-65, Computer Science
    ISBN 978-3-642-17536-7, ISSN 0302-9743 (Print) 1611-3349 (Online)
    DOI-Link Abstract
  5. Sergio Davies, Cameron Patterson, Francesco Galluppi, Alexander D. Rast, David Lester, and Steve B. Furber
    Interfacing Real-Time Spiking I/O with the SpiNNaker neuromimetic architecture
    17th International Conference, ICONIP 2010, Sydney, Australia, November 22-25, 2010.
    Neural Information Processing. Theory and Algorithms Lecture Notes in Computer Science Volume 6443, 2010, pp 58-65
    ISSN 1321-2133 ISBN: 978-3-642-17536-7
    Link Abstract PDF (434K) Copyright: Australian Journal of Intelligent Information Processing Systems.
  6. Humble, J., Furber, S.; Denham, S. and Wennekers, T.
    STDP pattern onset learning depends on background activity
    Proceedings of BICS 2010 - Brain Inspired Cognitive Systems pp. 55-65; 14-16 July 2010, Madrid, Spain.
    ISBN ISBN 978-84-614-1870-1 / 978-84-614-1869-5
    DOI-Link Link Abstract PDF (3.7M)
  7. Xin Jin, Mikel Lujan, Luis A. Plana, Sergio Davies, Steve Temple and Steve Furber
    Modeling Spiking Neural Networks on SpiNNaker
    Computing in Science & Engineering, Vol: 12 Iss:5, pp 91 - 97, Sept.-Oct. 2010.
    ISSN 1521-9615
    DOI-Link Abstract PDF (1.54M) IEEE Copyright
  8. Behram Khan, Matthew Horsnell, Mikel Lujan and Ian Watson
    Scalable Object-Aware Hardware Transactional Memory
    16th International Euro-Par Conference, Ischia, Italia, August 31 - September 3, 2010,
    Lecture Notes in Computer Science, 2010, Volume 6271/2010, 268-279,
    ISBN 978-3-642-15276-4*
    DOI-Link Abstract
  9. Martin Grymel, Steve B. Furber
    A Novel Programmable parallel CRC Circuit
    IEEE Transactions on very Large Scale Integration (VLSI) Systems, Issue 99, pp 1-5, August 2010
    ISSN 1063-8210
    DOI-Link Abstract PDF (186K) IEEE Copyright
  10. Sen Bhattacharya, B.; Furber, S.
    Biologically Inspired Means for Rank-Order Encoding Images: A Quantitative Analysis
    Neural Networks, IEEE Transactions on , vol.21, no.7, pp.1087-1099, July 2010
    ISSN 1045-9227
    DOI-Link Abstract IEEE Copyright
  11. Luis Tarazona, Douglas Edwards, Andrew Bardsley and Luis A. Plana
    Description-level optimisation of synthesisable asynchronous circuits.
    Proceedings of 13th EUROMICRO Conference on Digital System Design 2010 (DSD2010). Lille, September 2010, pp.441-448
    ISBN 978-1-4244-7839-2, ISSN ********
    DOI-Link Abstract PDF (*****K) IEEE Copyright
  12. Xin Jin, Francesco Galluppi, Cameron Patterson, Alexander Rast, Sergio Davies, Steve Temple and Steve Furber
    Algorithm and Software for Simulation of Spiking Neural Networks on the Multi-Chip SpiNNaker System
    2010 International Joint Conference on Neural Networks (IJCNN 2010) Barcelona, Spain, 18-23 July, 2010, pp.649-656
    ISBN 978-1-4244-6917-8, ISSN ********
    DOI-Link Abstract PDF (1185K) IEEE Copyright
  13. Xin Jin, Alexander Rast, Francesco Galluppi, Sergio Davies and Steve Furber
    Implementing Spike-Timing-Dependent Plasticity on SpiNNaker Neuromorphic Hardware
    2010 International Joint Conference on Neural Networks (IJCNN 2010) Barcelona, Spain, 18-23 July, 2010, pp.2302-2309
    ISBN 978-1-4244-6917-8, ISSN ********
    DOI-Link Abstract PDF (1271K) IEEE Copyright
  14. A. D. Rast, F. Galluppi, X. Jin and S.B. Furber
    The Leaky Integrate-and-Fire Neuron: A Platform for Synaptic Model Exploration on the SpiNNaker Chip
    2010 International Joint Conference on Neural Networks (IJCNN 2010) Barcelona, Spain, 18-23 July, 2010, pp.3959-3966
    ISBN 978-1-4244-6917-8, ISSN ********
    DOI-Link Abstract PDF (667K) IEEE Copyright
  15. Xin Jin, Mikel Lujan, Mukaram Khan, Luis A. Plana, Alexander Rast, Stephen Welbourne and Steve Furber
    Algorithm for Mapping Multilayer BP Networks onto the SpiNNaker Neuromorphic Hardware
    Proc. of the 9th International Symposium on Parallel and Distributed Computing (ISPDC 2010), pp. 9-16, July 7-9, 2010 Istanbul, Turkey.
    ISBN 978-0-7695-4120-4
    DOI-Link Abstract PDF (590K) IEEE Copyright
  16. Sam Taylor, Doug Edwards, Luis A. Plana and Luis A. Tarazona D.
    Asynchronous Data-Driven Circuit Synthesis
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, July 2010, Vol.18, Iss.7, pp. 1093 - 1106
    ISSN: 1063-8210
    DOI-Link Abstract PDF - Author's version (220K) IEEE Copyright
  17. C. Brej
    Wagging Logic: Implicit Parallelism Extraction Using Asynchronous Methodologies
    10th International Conference on Application of Concurrency to System Design, ACSD 2010,Braga, Portugal, June 21-25, 2010, pp. 35-44
    ISBN:978-1-4244-7266-6 , ISSN 1550-4808
    DOI-Link Abstract PDF (257K) IEEE Copyright
  18. Wei Song and Doug Edwards
    An Asynchronous Routing Algorithm for Clos Networks
    10th International Conference on Application of Concurrency to System Design ACSD 2010,Braga, Portugal, June 21-25, 2010, pp. 67-76
    ISBN: 978-1-4244-7266-6, ISSN 1550-4808
    DOI-Link Abstract PDF (627K) IEEE Copyright
  19. W. B. Toms and D. A. Edwards
    A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths
    10th International Conference on Application of Concurrency to System Design, ACSD 2010,Braga, Portugal, June 21-25, 2010, pp 24-34.
    ISBN:978-1-4244-7266-6, ISSN 1550-4808
    DOI-Link Abstract PDF (1294K) IEEE Copyright
  20. P. Balasubramanian and D.A. Edwards
    Self-Timed Realization of Combinational Logic
    19th International Workshop on Logic and Synthesis (IWLS 2010), California, USA, June 18-20, 2010.
    ISBN ********, ISSN ********
    DOI-Link Abstract PDF (213K) IEEE Copyright
  21. Jeremy Singer, Richard Jones, Gavin Brown and Mikel Lujan
    The Economics of Garbage Collection
    Proceedings of the 2010 international symposium on Memory management (ISMM 2010), pp 103--112, Toronto, Canada, 5-6 June, 2010.
    ISBN 978-1-4503-0054-4, ISSN 0362-1340*
    DOI-Link Abstract PDF (266K)
  22. Brackenbury, L.E.M. ; Plana, L.A. ; Pepper, J.
    System-on-Chip Design and Implementation
    IEEE Transactions on Education, May 2010, Vol.53, Iss.2, pp. 272 - 281
    ISSN 0018-9359
    DOI-Link Abstract PDF (479K) IEEE Copyright
  23. Javier Navaridas, Luis A. Plana, Jose Miguel-Alonso, Mikel Lujan, Steve Furber
    SpiNNaker: Effects of Traffic Locality and Causality on the Performance of the Interconnection Network
    Proc. of the ACM International Conference on Computing Frontiers, pp. 11-19, May 17-19, 2010, Bertinoro, Italy
    ISBN 978-1-4503-0044-5
    DOI-Link Abstract PDF (600K)
  24. Alexander D. Rast, Xin Jin, Francesco Galluppi, Luis A. Plana, Cameron Patterson, Steve Furber
    Scalable Event-Driven Native Parallel Processing: The SpiNNaker Neuromimetic System
    Proc. of the ACM International Conference on Computing Frontiers, pp. 21-29, May 17-19, 2010, Bertinoro, Italy
    ISBN 978-1-4503-0044-5
    DOI-Link Abstract PDF (801K)
  25. X. Jin, M. Lujan, M.M. Khan, L.A. Plana, A.D. Rast, S.R. Welbourne, S.B. Furber
    Efficient Parallel Implementation of Multilayer Backpropagation Network on Torus-connected CMPs
    Proc. of the ACM International Conference on Computing Frontiers, pp.89-90, May 17-19, 2010 Bertinoro, Italy
    ISBN 978-1-4503-0044-5
    DOI-Link Abstract PDF (268K)
  26. Andrew Brown, Steve Furber, Jeff Reeve, Peter Wilson, Mark Zwolinski, John Chad, Luis Plana, David Lester
    A communication infrastructure for a million processor machine
    Proc. of the ACM International Conference on Computing Frontiers, pp.75-76, May 17-19, 2010 Bertinoro, Italy
    ISBN 978-1-4503-0044-5
    DOI-Link Abstract PDF (61K)
  27. W. B. Toms and D. A. Edwards
    M-of-N Code Decomposition for Indicating Combinational Logic
    Proceedings of the 16th International Symposium on Asynchronous Circuits and Systems, (ASYNC 2010), pp. 15-25, Grenoble, France, 3-7 May 2010
    ISBN-13: 978-0-7695-4032-0, ISSN : 1522-8681
    DOI-Link Abstract PDF (429K) IEEE Copyright
  28. Christos Kotselidis, Mikel Luján, Behram Khan, Mohammad Ansari, Konstantinos Malakasis, Chris Kirkham and Ian Watson
    Clustering JVMs with Software Transactional Memory Support.
    24th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2010) Atlanta, USA, 19-23 April, 2010
    ISBN 978-1-4244-6442-5, ISSN 1530-2075
    DOI-Link Abstract IEEE Copyright
  29. Zheng Xie and Doug Edwards
    Computation Reduction for Statistical Analysis of the Effect of nano-CMOS Variability on Asynchronous Circuits
    Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 161-166, April 14-16, 2010, Vienna, Austria.
    ISBN 978-1-4244-6610-8
    DOI-Link Abstract PDF (641K) IEEE Copyright
  30. D.Richards ; D. Lester
    A Prototype Embedding of Bluespec SystemVerilog in the PVS Theorem Prover
    Proceedings of the Second NASA Formal Methods Symposium (NFM 2010), NASA/CP-2010-216215. March, 2010
    ISBN ********, ISSN ********
    Abstract PDF (192K)
  31. Lilian Janin, Shoujie Li and Doug Edwards
    Integrated Design Environment for Reconfigurable HPC
    ARC 2010, the 6th International Symposium on Applied Reconfigurable Computing,
    17 - 19 March 2010, Bangkok, Thailand.
    Lecture Notes in Computer Science, Volume 5992/2010, pp.406-413
    Reconfigurable Computing: Architectures, Tools and Applications, Springer Berlin / Heidelberg
    ISBN 978-3-642-12132-6, ISSN 0302-9743 (Print) 1611-3349 (Online)*
    DOI-Link Abstract
  32. Wei Song and Doug Edwards
    A low latency wormhole router for asynchronous on-chip networks.
    Proc. of the Asia and South Pacific Design Automation Conference (ASP-DAC 2010) Taipei, TAIWAN, January 2010
    ISBN 978-1-4244-5765-6
    DOI-Link Abstract PDF (483K) IEEE Copyright
  33. Mohammad Ansari, Behram Khan, Mikel Luján, Christos Kotselidis, Chris Kirkham and Ian Watson
    Improving Performance by Reducing Aborts in Hardware Transactional Memory.
    Proceedings of the 5th International Conference on High Performance and Embedded Architectures and Compilers, (HiPEAC), LNCS Volume 5952/2010, pp 35-49
    Springer Berlin / Heidelberg
    ISBN 978-3-642-11514-1, ISSN 0302-9743 (Print) 1611-3349 (Online)
    DOI-Link Abstract
2009 papers
2008 papers
2007 papers
2006 papers
Pre-2006 papers
| Skip to main content | Skip to navigation | Skip to Search |