The Advanced Processor Technologies Research Group
APT Group Papers
2009
- Xin Jin, Alexander Rast, Francesco Galluppi, Mukaram Khan and Steve Furber
Implementing Learning on the SpiNNaker Universal Neural Chip Multiprocessor
In: Neural Information Processing, Vol: 5863, pp. 425-432, Lecture Notes in Computer Science, 2009, Springer Berlin / Heidelberg
ISBN 978-3-642-10676-7
DOI-Link Abstract - J.D. Garside, S.B. Furber, S. Temple, J.V. Woods
The Amulet chips: Architectural Development for Asynchronous Microprocessors
Proc. International Conference on Electronics, Circuits and Systems (ICECS) 2009 pp.343-346
Yasmine-Hammamet, Tunisia, December 14-16, 2009
ISBN 978-1-4244-5090-9
DOI-Link Abstract PDF (313K) IEEE Copyright - Mohammed Abutheraa, David Lester
High Accuracy Machine-Efficient Chebyshev Approximations: an Application to Spectral Methods for Sobolev Spaces
Communication to SIMAI Congress Journal, Vol. 3 (2009) 225 (12pp)
ISSN 1827-9015
DOI-Link Abstract PDF (205K) - Wei Song and Doug Edwards
Building Asynchronous Routers with Independent Sub-Channels
Proc.International Symposium on System-on-Chip 2009, pp. 48-51
Tampere, Finland, October 5-7, 2009
ISBN 978-1-4244-4465-6
DOI-Link Abstract IEEE Copyright - Behram Khan, Matthew Horsnell,
Ian Rogers, Mikel Luján, Andrew Dinn and Ian Watson
Exploiting object structure in hardware transactional memory
International Journal of Computer Systems Science and Engineering, Vol 24, Sept. 2009, pp 303-315, CRL Publishing Ltd.
ISSN 02676192
Link Abstract PDF (967K) - Shufan Yang, Steve B Furber, Luis A Plana
Adaptive Admission Control on the SpiNNaker MPSOC
Proceedings IEEE International SOC Conference, pp.243-246,
September 9-11, 2009, Belfast, Northern Ireland, U.K.
ISBN 978-1-4244-5220-0
DOI-Link Abstract PDF (105K) IEEE Copyright - Luis Tarazona, Doug Edwards and Luis Plana
A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor
Proc. of 12th EUROMICRO Conference on Digital System Design 2009 (DSD2009), pp.627-634,
Patras, Greece. August, 27-29, 2009.
ISBN 978-0-7695-3782-5
DOI-Link Abstract PDF (119K) IEEE Copyright - P. Balasubramanian and D.A. Edwards
Heterogeneously encoded dual-bit self-timed adder
Proc. 5th International Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 120-123, July 12-17, 2009, Cork, Ireland.
ISBN 978-1-4244-3733-7
DOI-Link Abstract PDF (465K) IEEE Copyright - Andrew Bardsley, Luis Tarazona and Doug Edwards
Teak: A Token-Flow Implementation for the Balsa Language
Proc. 9th International Conference on the Application of Concurrency to System Design
(ACSD'09), Augsburg, Germany, 1-3 July 2009, pp. 23-31.
ISBN 978-0-7695-3697-2, ISSN 1550-4808
DOI-Link Abstract PDF (139K) IEEE Copyright - S.B. Furber and A.D. Brown
Biologically-Inspired Massively-Parallel Architectures - computing beyond a million processors
Proc. 9th International Conference on the Application of Concurrency to System Design
(ACSD'09), Augsburg, Germany, 1-3 July 2009 (keynote talk), pp. 3-12.
ISBN 978-0-7695-3697-2, ISSN 1550-4808
DOI-Link Abstract PDF (821K) IEEE Copyright - Jian Wu; Steve Furber
A Multicast Routing Scheme for a Universal Spiking Neural Network Architecture
The Computer Journal Advance Access published online on April 8, 2009
Online ISSN 1460-2067 - Print ISSN 0010-4620
DOI-Link Abstract - Morteza Gholipour, Mehrdad Nourani, Doug Edwards, and
Ali Afzali-Kusha
LLA: A low-latency asynchronous control with applications
International Symposium on Signals, Circuits and Systems, ISSCS 2009. 9-10 July 2009, pp. 1 - 4
ISBN: 978-1-4244-3785-6
DOI-Link Abstract PDF (K) IEEE Copyright - Javier Navaridas,
Mikel Luján, José Miguel-Alonso, Luis A. Plana and Steve Furber
Understanding the Interconnection Network of SpiNNaker
Proceedings of the 23rd International Conference on Supercomputing, pp 286-295, June 8-12, 2009,
IBM T.J. Watson Research Center, Metro New York City Area, USA.
ISBN :978-1-60558-498-0
DOI-Link Abstract - Sohini Dasgupta and Alex Yakovlev
A Desynchronisation Technique using Petri nets.
Electronic Notes in Theoretical Computer Science Volume 245, 2 August 2009, Pages 51-67 Proceedings of the 4th International Workshop on the Application of Formal Methods for Globally Asynchronous and Locally Synchronous Design (FMGALS 2009)
ISSN: 1571-0661
DOI-Link Abstract PDF- Author's version (238K) - ShufanYang, Steve Furber, Yebin
Shi and Luis A. Plana
A Token-Managed Admission Control System for QoS Provision on a Best-Effort GALS Interconnect
special issue of "Fundamenta Informaticae" - papers selected from ACSD'08 Conference.
ISSN 0169-2968 (Print) 1875-8681 (Online)
DOI-Link Abstract - Ansari, M.; Kotselidis, C.; Luján, M.; Kirkham, C.; Watson, I.
On the Performance of Contention Managers for Complex Transactional Memory Benchmarks
Parallel and Distributed Computing, 2009. ISPDC '09. Eighth International Symposium on June 30 2009-July 4 2009 Page(s):83 - 90
Lisbon, Portugal, June 30 - July 4, 2009
ISBN: 978-0-7695-3680-4
DOI-Link Abstract IEEE Copyright - M.M.Khan, J.Navaridas, X.Jin, L.A.Plana,
M.Luján, J.V.Woods, J.Miguel-Alonso and S.B.Furber.
Event-Driven Configuration of a Neural Network CMP System over a Homogeneous Interconnect Fabric
Proc. 8th IEEE International Symposium on parallel and Distributed Computing, ISPDC 2009, pp. 54-61
Lisbon, Portugal, June 30 - July 4, 2009
ISBN: 978-0-7695-3680-4
DOI-Link Abstract PDF (490K) IEEE Copyright - A.D. Rast, S.R. Welbourne, X. Jin and S.B. Furber
Optimal Connectivity In Hardware-Targetted MLP Networks
Proceedings 2009 International Joint Conference on Neural Networks, IJCNN2009, pp.2619-2626
Atlanta. Georgia, 14-19 June, 2009.
ISBN: 978-1-4244-3553-1(CD)/1-4244-1380-X(Bound), ISSN: 1098-7576
DOI-Link Abstract PDF (478K) IEEE Copyright - B.S. Bhattacharya and S.B. Furber
Evaluating Rank-order Code Performance Using A Biologically Derived Retinal Model
Proceedings 2009 International Joint Conference on Neural Networks, IJCNN2009, pp.2867-2874
Atlanta. Georgia, 14-19 June, 2009.
ISBN: 978-1-4244-3553-1(CD)/1-4244-1380-X(Bound), ISSN: 1098-7576
DOI-Link Abstract PDF (1546K) IEEE Copyright - A.D. Rast, M.M. Khan, X. Jin, L.A. Plana and S.B. Furber
A Universal Abstract-Time Platform for Real-Time Neural Networks
Proceedings 2009 International Joint Conference on Neural Networks, IJCNN2009, pp.2611-2618
Atlanta. Georgia, 14-19 June, 2009.
ISBN: 978-1-4244-3553-1(CD)/1-4244-1380-X(Bound), ISSN: 1098-7576
DOI-Link Abstract PDF (619K) IEEE Copyright - Y. Shi, S.B. Furber, J.D. Garside and L.A. Plana
Fault-Tolerant Delay-Insensitive Inter-Chip Communication
Proc. 15th IEEE International Symposium on Asynchronous Circuits and Systems, Async 2009, pp. 77-84.
Chapel Hill, North Carolina, USA, 17-20, May 2009.
ISBN-13: 978-0-7695-3616-3 , ISSN: 1522-8681
DOI-Link Abstract PDF (379K) IEEE Copyright - W. B. Toms and D.A. Edwards
Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks
Proc. 15th IEEE International Symposium on Asynchronous Circuits and Systems, Async 2009, pp. 139-150,
Chapel Hill, North Carolina, 17-20, May 2009.
ISBN-13: 978-0-7695-3616-3 , ISSN: 1522-8681
DOI-Link Abstract PDF (1009K) IEEE Copyright - J. Wu, S.B. Furber and J.D. Garside
A Programmable Adaptive Router for a GALS Parallel System
Proc. 15th IEEE International Symposium on Asynchronous Circuits and Systems, Async 2009
pp. 23-31, 17-20, May 2009, Chapel Hill, North Carolina,USA.
ISBN-13: 978-0-7695-3616-3 , ISSN: 1522-8681
DOI-Link Abstract PDF (179K) IEEE Copyright - P. Balasubramanian and D.A. Edwards
Dual-Sum Single-Carry Self-Timed Adder Designs
Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 121-126.
May 13-15, 2009, Tampa, Florida, USA.
ISBN: 978-0-7695-3684-2
DOI-Link Abstract PDF (291K) IEEE Copyright - Wei Song, Doug Edwards, Jose Nunez-Yanez
and Sohini Dasgupta
Adaptive Stochastic Routing in Fault-tolerant On-chip Network
Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip, NOCS_2009, pp 32-37,
May 10-13, 2009, San Diego, CA. USA.
ISBN: 978-4244-4131-3
DOI-Link Abstract PDF (359K) IEEE Copyright - C. Brej and D.A. Edwards
Forward and Backward Guarding in Early Output Logic
Proc. 12th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS),
April 15-17, 2009, Liberec, Czech Republic.
ISBN 978-1-4244-3339-1
DOI-Link Abstract PDF (154K) IEEE Copyright - P. Balasubramanian, D.A. Edwards and C. Brej
Self-Timed Full Adder Designs based on Hybrid Input Encoding
Proc. 12th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 56-61,
April 15-17, 2009, Liberec, Czech Republic.
ISBN 978-1-4244-3339-1
DOI-Link Abstract PDF (304K) IEEE Copyright - P. Balasubramanian and D.A. Edwards
Power, Delay and Area Efficient Self-Timed Multiplexer and Demultiplexer Designs
Proc. 4th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)/, pp. 173-178, April 6-7, 2009, Cairo, Egypt.
ISBN: 978-1-4244-4321-5
DOI-Link Abstract PDF (523K) IEEE Copyright - M.M. Khan, E. Painkras, X. Jin, L.A. Plana,
J.V. Woods and S.B. Furber
System Level Modelling for SpiNNaker CMP System
Proc. 1st International Workshop on Rapid Simulation and Performance Evaluation:
Methods and Tools (RAPIDO'09). Paphos, Cyprus, January 25, 2009
ISBN , ISSN
Abstract PDF (400K) - Mohammad Ansari, Kim Jarvis, Christos Kotselidis, Mikel Luján, Chris Kirkham and Ian Watson.
Profiling Transactional Memory Applications.
Proceedings of the 17th International Conference on Parallel, Distributed, and Network-based Processing (PDP'09), Weimar, Germany, 18-20 Febuary 2009, pp.11-20
ISBN 978-0-7695-3544-9
DOI-Link Abstract IEEE Copyright - Mohammad Ansari, Mikel Luján, Christos Kotselidis, Kim Jarvis, Chris Kirkham and Ian Watson.
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
Proceedings of the 4th International Conference on High Performance and Embedded Architectures and Compilers (HiPEAC'09), LNCS 5409, pp 4-18, January 2009.
ISBN: 978-3-540-92989-5
DOI-Link - LNCS Abstract
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