Advanced Processor Technologies Home
APT Advanced Processor Technologies Research Group

Exploiting object structure in hardware transactional memory

Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Luján, Andrew Dinn and Ian Watson


Transactional Memory (TM) is receiving attention as a way of expressing parallelism for programming multi-core systems. As a parallel programming model it is able to avoid the complexity of conventional locking. TM can enable multi-core hardware that dispenses with conventional bus-based cache coherence, resulting in simpler and more extensible systems. This is increasingly important as we move into the many-core era. Within TM, however, the processes of conflict detection and committing still require synchronisation and the broadcast of data. By increasing the granularity of when synchronisation is required, the demands on communication are reduced. Software implementations of TM have taken advantage of the fact that the object structure of data can be employed to further raise the level at which interference is observed. The contribution of this paper is the first hardware TM approach where the object structure is recognised and harnessed. This leads to novel commit and conflict detection mechanisms, and also to an elegant solution to the virtualization of version management, without the need for additional softwareTM support. A first implementation of the proposed hardwareTM system is simulated. The initial evaluation is conducted with three benchmarks derived from the STAMP suite and a transactional version of Lee’s routing algorithm.