The Impact of Technology Scaling in the SpiNNaker Chip Multiprocessor

E. Painkras and S. Furber

Abstract

This paper focuses on technology scaling of the SpiNNaker Chip Multiprocessor (CMP). A detailed characterization of the SpiNNaker Processor Node has been carried out in 130nm and 90nm semiconductor processes with many variants of the process libraries exploring the area, power and performance aspects. Experimental results of processor node performance, power dissipation and silicon area are presented and have been used to predict the best technology for a future SpiNNaker CMP for high-performance computing.