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A low latency wormhole router for asynchronous on-chip networks.

Wei Song and Doug Edwards


Asynchronous on-chip networks are power efficient and tolerant to process varia tion but they are slower than synchronous on-chip networks. A low latency async hronous wormhole router is proposed using sliced sub-channels and the lookahead pipeline. Channel slicing removes the C-element tree in the completion detecti on circuit and convert a channel into multiple independent sub-channels reducin g the cycle period. The lookahead pipeline uses the early evaluation protocol t o reduce cycle period. Using the lookahead pipeline on the pipeline stages with the maximal cycle period improves the overall throughput. The router is implem ented by a 0.13 um technology. The cycle period of the router at the typical co rner is 1.7 ns, providing 2.35GByte/sec throughput per port.

PDF (483K). IEEE Copyright