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APT Advanced Processor Technologies Research Group




Asynchronous networks-on-chip (NoCs) are promising candidates for future multi-core chip-multiprocessors and systems-on-chip due to their low dynamic energy dissipation, tolerance to delay variations, unified network interfaces, easy system integration and excellent electro-magnetic compatibility. After a small introduction of asynchronous circuits, the current research progress of asynchronous NoCs have been reviewed from different aspects including topologies, async/sync interfaces, flow control methods, quality-of-service, routing algorithms, low power design, fault-tolerance and testing, and design automation. A case study of several representative designs of asynchronous NoCs is provided. It is shown that asynchronous NoCs have many advantages over their synchronous counterparts and a significant portion of future many-core systems will use asynchronous NoCs as their on-chip communication structures, but it is urgent to improve their usability and network performance.