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A Chip Multiprocessor for a Large-scale Neural Simulator

Painkras, E.


The modelling and simulation of large-scale spiking neural networks in biological real-time places very high demands on computational processing capabilities and communications infrastructure. These demands are difficult to satisfy even with powerful general-purpose high-performance computers. Taking advantage of the remarkable progress in semiconductor technologies it is now possible to design and build an application-driven platform to support large-scale spiking neural network simulations. This research investigates the design and implementation of a power-efficient chip multiprocessor (CMP) which constitutes the basic building block of a spiking neural network modelling and simulation platform. The neural modelling requirements of many processing elements, high-fanout communications and local memory are addressed in the design and implementation of the low-level modules in the design hierarchy as well as in the CMP. By focusing on a power-efficient design, the energy consumption and related cost of SpiNNaker, the massively-parallel computation engine, are kept low compared with other state-of-the-art hardware neural simulators. The SpiNNaker CMP is composed of many simple power-efficient processors with small local memories, asynchronous networks-on-chip and numerous bespoke modules specifically designed to serve the demands of neural computation with a globally asynchronous, locally synchronous (GALS) architecture. The SpiNNaker CMP, realised as part of this research, fulfills the demands of neural simulation in a power-efficient and scalable manner, with added fault-tolerance features. The CMPs have, to date, been incorporated into three versions of SpiNNaker system PCBs with up to 48 chips onboard. All chips on the PCBs are performing successfully, during both functional testing and their targeted role of neural simulation.

The thesis is available as PDF (46MB).