Building a Common Vision for the UK Microelectronic Design Research Community

 

Call for the November 15 workshop at the IEE, Savoy Place, London. [PDF]

Vision Statements

Bio-inspiration

1.   Bio-Inspired Computing Architectures, Andy Tyrrell, York. [PDF]

2.   Implementing biologically inspired architectures using microelectronics, Leslie Smith, Stirling. [PDF]

3.   Building a synthetic sensory-motor system, Leslie Smith, Stirling. [PDF]

4.   Bio-inspired hardware, Liam McDaid (Ulster) & Steve Hall (Liverpool). [PDF]

Building brains

5.   The architecture of brain and mind (UKCRC Grand Challenge). [PDF]

6.   On the creation of a mind, Andrew Brown et al, Southampton. [PDF]

7.   A real-time simulation of the human brain, Steve Furber, Manchester. [PDF]

Sensors & ambient computing

8.   Making Measurements, David Cumming, Glasgow. [PDF]

9.   Making the environment aware of the disabled, Peter Saul, Saul Research. [PDF]

10. Smart Sensors and Vision Chips, Peter Hicks et al, Manchester. [PDF]

11. Wireless design, Bill Redman-White (Southampton) & Ian Robertson (Leeds). [PDF]

Systems & system synthesis

12. Power Efficiency and Reconfigurability, George Constantinides, Imperial. [PDF]

13. System Design, Andrew Brown et al, Southampton. [PDF]

14. Platform-based design, Mark Josephs, South Bank. [PDF]

15. Soft Time in hARd Space STARS), or mapping designs with blocks cut loose, Yakovlev & Bystrov, Newcastle. [PDF]

16. Architecture synthesis for embedded systems, Nigel Topham, Edinburgh. [PDF]

17. Supporting SoC on FPGA, Andy Downton & Martin Fleury, Essex. [PDF]

18. Challenging the processing demand for the provisioning of QoS and security for next generation networks, Sezer, McLoone & McCanny, QUB. [PDF]

19. Zero power electronics, Simon Moore, Cambridge. [PDF]

20. Communication centric circuit design, Simon Moore, Cambridge. [PDF]

21. Chip multiprocessors, Ian Watson, Manchester. [PDF]

Life after CMOS-as-we-know-it

22. Impact of nano-CMOS devices on future microelectronic design, Asenov & Roy, Glasgow. [PDF]

Design infrastructure

23. Design infrastructure, John McLean, MSC RAL. [PDF]

Documents that arrived too late for the November 15 workshop notes

24. An open platform for programmable logic, Raymond Ambrose, ST. [PDF]

25. Generalised Open Source Programmable Logic (GOSPL). [PDF]

26. Analogue VLSI, Piotr Dudek, Manchester. [PDF]

27. SoC Grand Challenges, John McCanny, QUB. [PDF]

28. Silicon Grand Challenges, Luke Seed, Sheffield. [PDF]

29. Design methodologies for complex SoC, Roger Woods, QUB. [PDF]

 

 

Page maintained by steve.furber@manchester.ac.uk

Last modified 25 January 2005