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The Jamaica Project

News: EPSRC studentships available for postgraduate study on the Jamaica project!

The Jamaica project is investigating the design of chip multi-processors (CMPs) and their accompanying parallel software environments. CMP architectures have been widely accepted by many processor chip manufacturers as a solution to the design problems accompanying the scale-up to "billion transistor" chips. The rationale for this choice is that designing logic to interconnect multiple cores based on existing designs is enormously simpler than trying to build one core which will use all the available silicon.

Despite the widespread convergence on CMP as a promising design strategy, there are many issues yet to be resolved in the design of both the hardware and its accompanying software environment. In particular:

The hardware must be able to efficiently support an operating system which can distribute execution of application code to all the available cores. Distribution and synchronization costs must be low and it must be easy to detect the presence of idle cores.
The operating system must, in turn, rely upon advanced compiler technology to automate, as far as possible, this distribution of work. Most applications cannot feasibly be designed (or rewritten) to allow for all possible CMP configurations, coping with anything from, say, 2 to 64 cores.
A dynamic parallelizing compiler is essential if the distribution problem is to be addressed. Both application and operating system code need to be optimized appropriate to the CMP configuration found at runtime or even recompiled on the fly using feedback directed recompilation.

All three of these elements of the CMP platform need to be designed together if the promise of CMP architectures is to be fulfilled.

The Jamaica project is organized into three collaborating strands reflecting the interplay between computer architecture, compiler and operating system. (Quick links: Project members, Publications, Intranet (campus only))

Computer Architecture

Chip multi-processor design with fast cycle-accurate simulation: Advances in silicon technology have provided designers with more on-chip resources. However, this poses greater design problems in using the available silicon. The Jamaica project is focusing on the design of chip multi-processors. Benchmarks run on cycle accurate simulators allow development of prototypes and determination of optimal configurations without incurring long development cycles. The project also carries out co-design of architectural features and compiler optimizations.
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Compilation

Static & dynamic compilation: The Jamaica architecture's novel features, such as light-weight threading, require extensions to existing static compilers and dynamic compilers. The Jamaica project has a mix of static compilers (for languages like C) and dynamic compilers (such as the Java virtual machine).
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Super-compiler optimization: Super-compiler optimizations are a class of optimization for parallelizing programs. They convert loops so they may be executed in parallel, ideally creating a factor speed-up equal to the number of computing elements available within the processor.
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Advanced parallelism discovery: Certain classes of loops contain dependencies that prevent straight forward parallelisation using typical supercompiler optimization. By advanced analysis we are hoping to show and exploit parallelism in loops that haven't previously been optimized.
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Operating Systems

Co-design of operating system and compiler: Current operating systems designs produce problems with performance and security whilst also requiring special hardware. The Jamaica project is producing ways in which to improve operating system design whilst allowing for simpler hardware.
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Next generation virtual machines: Virtual machines are of increased importance to computer users. Virtual machines can protect two operating systems running on the same hardware from each other. They may also provide managed runtime environments for statically typed languages such as Java, or dynamically typed languages such as Perl. Find out how the Jamaica project is at the current edge of nested virtual machine design for the execution of legacy code, static and dynamically typed languages.
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Project Members

Alumni

Dr. Greg Wright
Dr. Ahmed El-Mahdy
John Levon
Dr. M. Manjunathaiah
Ming Chen
Georgios Gousios
Dr. Richard Matley
John Burcham
Yun Zhang
John Burcham
Anastasios (Tasos) Katsigiannis
Andrew Dinn
Panagiota (Teta) Bilianou
Dr. Konstantinos Nikas
Dr. Jisheng Zhao

Publications

Optimizing Chip Multiprocessor Work Distribution using Dynamic Compilation: Jisheng Zhao, Matthew Horsnell, Ian Rogers, Andrew Dinn, Chris Kirkham, Ian Watson.
Euro-Par, IRISA/ENS Cachan, Rennes, France, 28-31 August 2007
Lazy Interprocedural Analysis for Dynamic Loop Parallelization: Jisheng Zhao, Chris Kirkham, Ian Rogers.
Workshop on New Horizons in Compilers, Bangalore, India, December 2006.
A Java Virtual Machine Extended to Run Parrot Bytecode: Martin Dahl
MSc thesis, Dept. of Computer Science, University of Manchester, 2006.
Parallelizing the Jikes Research Virtual Machine: Christos Kotselidis
MSc thesis, Dept. of Computer Science, University of Manchester, 2006.
Adding an Interpreter to the Jikes RVM: Anastasios Katsigiannis
MSc thesis, Dept. of Computer Science, University of Manchester, 2006.
Loop Parallelisation for the Jikes RVM: Jisheng Zhao, Ian Rogers, Chris Kirkham, Ian Watson.
Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2005, Dalian, China, December 5-8, 2005.
Concept Assignment as a Debugging Technique for Code Generators: Jeremy Singer.
Fifth IEEE International Workshop on Source Code Analysis and Manipulation, SCAM 2005, Budapest, Hungary, September 2005.
An X86 Emulator Written Using Java: John Burcham
MSc thesis, Dept. of Computer Science, University of Manchester, 2005.
Memory Management in JikesNode Operating System: Yun Zhang
MSc thesis, Dept. of Computer Science, University of Manchester, 2005.
JikesNODE and PearColator: A Jikes RVM Operating System and Legacy Code Execution Environment (presentation): Ian Rogers, Chris Kirkham.
2nd ECOOP Workshop on Programming Languages and Operating Systems (ECOOP-PLOS'05), Glasgow, July 26, 2005.
An Automatic Runtime DOALL Loop Parallelisation Optimization for Java: Ian Rogers, Jisheng Zhao, Chris Kirkham, Ian Watson.
Parallel/High-Performance Object-Oriented Scientific Computing (POOSC'05), Glasgow, July 25, 2005.
Virtualization and chip multiprocessor memory management: the JAMAICA architecture: Ian Rogers, Matthew Horsnell, Ian Watson.
5th UK Memory Management Network Workshop, Glasgow, July 14, 2005.
A System for Runtime Loop Optimisation in the Jikes RVM (presentation): Jisheng Zhao, Ian Rogers, Chris Kirkham.
PREP 2005, Lancaster, 2005.
Harnessing Java for Novel Chip Multiprocessor Architecture Simulations: Matthew Horsnell.
PREP 2005, Lancaster, 2005.
Virtual Machines and Chip Multiprocessors: Ian Rogers, Ian Watson.
Cambridge Programming Research Group invited seminar, Cambridge, November 26, 2004.
A Java Virtual Machine For The ARM Processor: Ming Chen
MSc thesis, Dept. of Computer Science, University of Manchester, 2004.
JikesNODE: A Java Operating System: Georgios Gousios
MSc thesis, Dept. of Computer Science, University of Manchester, 2004.
Native Code Execution Within a JVM: Richard Matley
MSc thesis, Dept. of Computer Science, University of Manchester, 2004.
Jikes RVM Adaptive Optimization System with Intelligent Algorithms: Jisheng Zhao
MSc thesis, Dept. of Computer Science, University of Manchester, 2004.
Cycle-Accurate, Distributed Chip Multiprocessor Simulation: Matthew Horsnell
Poster Presentation, PREP 2004
Winner of IEE Sponsored Best Poster Presentation
Dynamic Java Threads on the JAMAICA Single-Chip Multiprocessor: Greg Wright, Ahmed El-Mahdy, Ian Watson
Chapter 11, Java Microarchitectures. Kluwer 1-4020-7034-9, pages 207-229, 2002.
Edited by Vijaykrishnan Narayanan, Mario L. Wolczko,
Java Machine and Integrated Circuit Architecture (JAMAICA): Greg Wright, Ahmed El-Mahdy, Ian Watson
Chapter 10, Java Microarchitectures. Kluwer 1-4020-7034-9, pages 187-206, 2002.
Edited by Vijaykrishnan Narayanan, Mario L. Wolczko,
A Vector Architecture for Multimedia Java Applications: Ahmed El-Mahdy
PhD thesis, Dept. of Computer Science, University of Manchester, 2001.
A Two Dimensional Vector Architecture for Multimedia: Ahmed El-Mahdy and Ian Watson
In the Proceedings of the European Conference on Parallel Computing, Euro-Par 2001.
Lecture Notes in Computer Science (LNCS 2150). Springer-Verlag, 2001.
A Single-Chip Multiprocessor Architecture with Hardware Thread Support.: G.M. Wright
PhD thesis, Dept. of Computer Science, University of Manchester, January 2001.
Dynamic Java Threads on the Jamaica Single-Chip Multiprocessor: Greg Wright, Ahmed El-Mahdy, and Ian Watson
In the Proceedings of the Second Annual Workshop on Hardware Support for Objects and Microarchitectures for Java (in conjunction with ICCD'00), pages 1-5, Austin, Texas, 2000.
VLSI architecture using lightweight threads (VAULT) - choosing the instruction set architecture: Greg Wright, Ahmed El-Mahdy, and Ian Watson
In the Proceedings of the First Annual Workshop on Hardware Support for Objects and Microarchitectures for Java (in conjunction with ICCD'99), pages 40-44, Austin, Texas, 1999.

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